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Why Use DSP?: An introductory course in DSP system design

Having heard a lot about digital signal processing (DSP) technology, you may have wanted to find out what can be done with DSP, investigate why DSP is

Why Use DSP?: An introductory course in DSP system design

Dec 1, 1997 12:00 PM,
David Skolnick and Noam Levine

Having heard a lot about digital signal processing (DSP) technology, youmay have wanted to find out what can be done with DSP, investigate why DSPis preferred to analog circuitry for many types of operations, and discoverhow to learn enough to design your own DSP system. This article is anopportunity to take a substantial first step towards finding the answers toyour questions with an introduction to DSP topics from the point of view ofanalog system designers seeking additional tools for handling analogsignals. Designers reading this article can learn about the possibilitiesof DSP to deal with analog signals and where to find additional sources ofinformation and assistance.

What is [a] DSP? In brief, DSPs are processors or microcomputers whosehardware, software and instruction sets are optimized for high-speednumeric processing applications – an essential for processing digital datarepresenting analog signals in real time. What a DSP does isstraightforward. When acting as a digital filter, for example, the DSPreceives digital values based on samples of a signal, calculates theresults of a filter function operating on these values, and providesdigital values that represent the filter output. It can also provide systemcontrol signals based on properties of these values. The DSP’s high-speedarithmetic and logical hardware is programmed to execute algorithmsmodeling the filter transformation rapidly.

The combination of design elements – arithmetic operators, memory handling,instruction set, parallelism, data addressing – that provide this abilityforms the key difference between DSPs and other kinds of processors.Understanding the relationship between real-time signals and DSPcalculation speed provides some background on just how special thiscombination is. The real-timesignal comes to the DSP as a train ofindividual samples from an analog-to-digital converter (ADC). To performfiltering in real-time, the DSP must complete all the calculations andoperations required for processing each sample (usually updating a processinvolving many previous samples) before the next sample arrives. Performinghigh-order filtering of real-world signals having significant frequencycontent demands really fast processors.

Why use a DSP?To get an idea of the type of calculations a DSP does and get an idea ofhow an analog circuit compares with a DSP system, one could compare the twosystems in terms of a filter function. The familiar analog filter usesresistors, capacitors, inductors and amplifiers. It can be cheap and easyto assemble, but it may be difficult to calibrate, modify and maintain, anddifficulties increase exponentially with filter order. For many purposes,one can more easily design, modify and depend upon filters using a DSPbecause the filter function on the DSP is software-based, flexible andrepeatable. Further, to create flexibly adjustable filters withhigher-order response requires only software modifications with noadditional hardware, unlike purely analog circuits. An ideal bandpassfilter, with the frequency response shown in Figure 1, would have the aresponse within the passband that is completely flat with zero phase shiftand infinite attenuation in the stopband. Useful additions would includepassband tuning, width control and stopband rolloff control. As Figure 1shows, an analog approach using second-order filters would require quite afew staggered high-Q sections; the difficulty of tuning and adjusting itcan be imagined.

With DSP software, there are two basic approaches to filter design: finiteimpulse response (FIR) and infinite impulse response (IIR). The FIRfilter’s time response to an impulse is the straightforward weighted sum ofthe present and a finite number of previous input samples. Having nofeedback, its response to a given sample ends when the sample reaches the”end of the line” (Figure 2). An FIR filter’s frequency response has nopoles but only zeros. The IIR filter, by comparison, is called infinitebecause it is a recursive function; its output is a weighted sum of inputsand outputs. Because it is recursive, its response can continueindefinitely. An IIR filter frequency response has both poles and zeros.

The “x” denotes the input samples, and the “y” represents output samples,as are input sample weightings, and “b” is output sample weightings.Present sample time is shown as “n”, and “M” and “N” are the number ofsamples programmed (the filter’s order). Note that the arithmeticoperations indicated for both types are simply sums and products – inpotentially great number. In fact, multiply-and-add is the case for manyDSP algorithms that represent mathematical operations of greatsophistication and complexity.

Approximating an ideal filter consists of applying a transfer function withappropriate coefficients and a high enough order or number of taps(considering the train of input samples as a tapped delay line). Figure 3shows the response of a 90-tap FIR filter compared with sharp-cutoffChebyshev filters of various orders. The 90-tap example suggests how closethe filter can come to approximating an ideal filter. Within a DSP system,programming a 90-tap FIR filter – like the one in Figure 3 – is not adifficult task. By comparison, it would not be cost-effective to attemptthis level of approximation with a purely analog circuit. Another crucialpoint in favor of using a DSP to approximate the ideal filter is long-termstability. With an FIR (or an IIR having sufficient resolution to avoidtruncation-error buildup), the programmable DSP achieves the same responsetime after time. Purely analog filter responses of high order, however, areless stable with time.

Mathematical transform theory and practice are the core requirements forcreating DSP applications and understanding their limits. This articlewalks through a few signal analysis and processing examples to introduceDSP concepts.

Sampling real-world signalsReal-world phenomena are analog – the continuously changing energy levelsof physical processes like sound, light, heat, electricity and magnetism. Atransducer converts these levels into manageable electrical voltage andcurrent signals, and an ADC samples and converts these signals to digitalfor processing. The conversion rate, or sampling frequency, of the ADC iscritically important to digital processing of real-world signals.

This sampling rate is determined by the amount of signal information thatis needed for processing the signals adequately for a given application. Inorder for an ADC to provide enough samples to describe the real-worldsignal accurately, the sampling rate must be at least twice thehighest-frequency component of the analog signal. For example, to describean audio signal containing frequencies up to 20 kHz accurately, the ADCmust sample the signal at a minimum of 40 kHz. Because arriving signals caneasily contain component frequencies above 20 kHz (including noise), theymust be removed before sampling by feeding the signal through a low-passfilter ahead of the ADC. This filter, known as an anti-aliasing filter, isintended to remove the frequencies above 20 kHz that could corrupt theconverted signal. However, the anti-aliasing filter has a finite frequencyrolloff, so additional bandwidth must be provided for the filter’stransition band. For example, with an input signal bandwidth of 20 kHz, onemight allow 2 to 4 kHz of extra bandwidth.

Figure 4 depicts the filter needed to reject any signals with frequenciesabove half of a 48-kHz sampling rate. Rejection means attenuation to lessthan 1/2 least-significant bit (LSB) of the ADC’s resolution. One way toachieve this level of rejection without a highly sophisticated analogfilter is to use an oversampling converter, such as a sigma-delta ADC. Ittypically obtains low-resolution (e.g., 1-bit) samples at megahertz rates -much faster than twice the highest frequency component – greatly easing therequirement for the analog filter ahead of the converter. An internaldigital filter (DSP at work) restores the required resolution and frequencyresponse. For many applications, oversampling converters reduce systemdesign effort and cost.

Processing real-world signalsThe ADC sampling rate depends on the bandwidth of the analog signal beingsampled. This sampling rate sets the pace at which samples are availablefor processing. Once the system bandwidth requirements have established theA/D converter sampling rate, the designer can begin to explore the speedrequirements of the DSP processor.

Processing speed at a required sample rate is influenced by algorithmcomplexity. As a rule, the DSP needs to finish all operations relating tothe first sample before receiving the second sample. The time betweensamples is the time budget for the DSP to perform all processing tasks. Forthe audio example, a 48-kHz sampling rate corresponds to a 20.833-micro ssampling interval. Figure 5 relates the analog signal and digital samplingrate.

Next, consider the relation between the speed of the DSP and complexity ofthe algorithm (the software containing the transform or other set ofnumeric operations). Complex algorithms require more processing tasks.Because the time between samples is fixed, the higher complexity calls forfaster processing.

For example, suppose that the algorithm requires 50 processing operationsto be performed between samples. Using the previous example’s 48 kHzsampling rate (20.833-micro s sampling interval), one can calculate theminimum required DSP processor speed in millions of operations per second(MOPS) as follows:

Thus, if all of the time between samples is available for operations toimplement the algorithm, a processor with a performance level of 2.4 MOPSis required. Note that the two common ratings for DSPs, based on operationsper second (MOPS) and instructions per second (MIPS), are not the same. Aprocessor with a 10 MIPS ratingthat can perform eight operations perinstruction has basically the same performance as a faster processor with a40 MIPS rating that can only perform two operations per instruction.

Sampling various real-world signalsThere are two basic ways to acquire data: either one sample at a time orone frame at a time (continuous processing vs. batch processing).Sample-based systems, like a digital filter, acquire data one sample at atime. As shown in Figure 6, at each tick of the clock, a sample comes intothe system and a processed sample is output. The output waveform developscontinuously.

Frame-based systems, like a spectrum analyzer, which determine thefrequency components of a time-varying waveform, acquire a frame (or blockof samples). Processing occurs on the entire frame of data and results in aframe of transformed data, as shown in Figure 7.

For an audio sampling rate of 48 kHz, a processor working on a frame of1,024 samples has a frame acquisition interval of 21.33 ms (i.e., 1,024 x20.833 micro s = 21.33 ms). Here the DSP has 21.33 ms to complete all therequired processing tasks for that frame of data. If the system handlessignals in real time, then it must not lose any data. While the DSP isprocessing the first frame, it must also be acquiring the second frame.Acquiring the data is one area where special architectural features of DSPscome into play. Seamless data acquisition is facilitated by a processor’sflexible data-addressing capabilities in conjunction with its directmemory-accessing (DMA) channels.

Responding to real-world signalsOne cannot assume that all the time between samples is available for theexecution of processing instructions. In reality, time must be budgeted forthe processor to respond to external devices, controlling the flow of datain and out. Typically, an external device (such as an ADC) signals theprocessor using an interrupt. The DSP’s response time to that interrupt, orinterrupt latency, directly influences how much time remains for actualsignal processing.

Interrupt latency (response delay) depends on several factors of which themost dominant is the DSP architecture’s instruction pipelining. Aninstruction pipeline consists of the number of instruction cycles thatoccur between the time an interrupt is received and the time that programexecution resumes. More pipeline levels in a DSP result in longer interruptlatency. For example, if a processor has a 20 ns cycle time and requires 10cycles to respond to an interrupt, 200 ns elapse before it executes anysignal-processing instructions.

When data is acquired one sample at a time, this 200 ns overhead will nothurt if the DSP finishes the processing of each sample before the nextarrives. When data is acquired sample-by-sample while processing a frame ata time, however, an interrupted system wastes processor instruction cycles.For example, a system with a 200 ns interrupt response time running aframe-based algorithm, such as the FFT, with a frame size of 1,024 samples,would require 204.8 micro s of overhead. That amounts to more than 10,000instruction cycles wasted to latency – productive time when the DSP couldbe performing signal processing. This waste is easy to avoid in DSPs havingarchitectural features such as DMA and dual memory access; they let the DSPreceive and store data without interrupting the processor.

Developing a DSP systemHaving discussed the role of the processor, the ADC, the anti-aliasingfilter and the timing relationships between these components, it is time tolook at a complete DSP system. Figure 8 shows the building blocks of atypical DSP system that could be used for data acquisition and control.

Note how few components make up the DSP system because so much of thesystem’s functionality comes from the programmable DSP. Converters funneldata into and out of the DSP; the ADC timing is controlled by a precisesampling clock. To simplify system design, many converter devices availabletoday combine some or all of the following: an A/D converter, a D/Aconverter, a sampling clock and filters for anti-aliasing and anti-imaging.The clock oscillator in these types of I/O components is separatelycontrolled by an external crystal.

Here are some important points about the data flow in this sort of DSP system:

* Analog Input: The analog signal is appropriately band-limited by theanti-aliasing filter and applied to the input of the ADC. At the selectedsampling time, the converter interrupts the DSP processor and makes thedigital sample available. The choice between serial and parallelinterfacing between the ADC and DSP depends on the amount of data, designcomplexity trade-offs, space, power and price.

* Digital Signal Processing: The incoming data is handled by the DSP’salgorithm software. When the processor completes the required calculations,it sends the result to the DAC. Because the signal processing isprogrammable, considerable flexibility is available in handling the dataand improving system performance with incremental programming adjustments.

* Analog Output: The DAC converts the DSP’s output into the desired analogoutput at the next sample clock. The converter’s output is smoothed by alow-pass, anti-imaging filter (also called a reconstruction filter), toproduce the reconstructed analog signal.

* Host Interface: An optional host interface lets the DSP communicate withexternal systems, sending and receiving data and control information.

ReviewThe goal of this article has been to provide an overview of major DSPdesign concepts and explain some of the reasons why a DSP is better suitedthat analog circuitry for some applications. The issues introduced in thisarticle included a DSP overview, real-time DSP operation, real-worldsignals, sampling rates and anti-alias filtering, DSP algorithm time budgetand sample-driven versus frame driven data acquisition.

Because these issues involve many valuable levels of detail that we couldnot do justice to in this brief article, you should consider readingRichard Higgins’s text, Digital Signal Processing in VLSI (see Referencesbelow). This text provides a complete overview of DSP theory,implementation issues, and reduction to practice (with devices available atthe time it was published), plus exercises and examples. The followingreference section below also contains other sources that further amplifythis article’s issues.

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